I decided that it was time for me to get around to writing a memory map for a Bally -17 MPU board, wired for 9316A ROMs, as supplied from the factory (with E1-E2, E3-E4, E6-E7). However what I found leaves me somewhat confused. The standard configuration for a -17 MPU connects addresses A0 to A10 to the U2 and U6 ROM sockets. That's the correct number of address lines to access 2kB, the size of a 9316A standard ROM. In addition, A11 and A12 are used to select the ROM (A12 hi = ROM area, A11 hi selects U2, A11 lo selects U6). All good so far.
Note that A9 is one of those address lines, and goes to pin 22 on each of these sockets, as expected.
However, the /CS chip select on pin 21 of each of these locations is fed with /A9 (the A9 signal, but inverted). This means that the ROM will only be enabled when A9 is high. Thus the address lines to the ROMs can cover the whole 2kB, but as each ROM will only be enabled when A9 is high, we can actually only address 1kB in each device.
This seems crazy - so logically, I must have missed something. Can anyone point out the error in my logic? I hope so!
Thank you in advance,
Mark
arcadeexperts.com
Note that A9 is one of those address lines, and goes to pin 22 on each of these sockets, as expected.
However, the /CS chip select on pin 21 of each of these locations is fed with /A9 (the A9 signal, but inverted). This means that the ROM will only be enabled when A9 is high. Thus the address lines to the ROMs can cover the whole 2kB, but as each ROM will only be enabled when A9 is high, we can actually only address 1kB in each device.
This seems crazy - so logically, I must have missed something. Can anyone point out the error in my logic? I hope so!
Thank you in advance,
Mark
arcadeexperts.com
